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基于CPLD的水中主动声探测仪计数检波器设计

The Count Demodulator Design of Underwater Active Acoustic Detecting Device Based on CPLD
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摘要 从提高水中主动声探测仪检波器的工作性能角度出发,提出了一种能够克服传统二极管包络检波器缺点的计数检波器,通过在1 m s时间内统计输入信号的脉冲个数,来区分干扰脉冲和回波信号.在X il-inx foundation series3.1软件平台上,采用VHDL(超高速硬件描述语言)和自顶向下的方法,完成了基于CPLD(可编程逻辑器件)的计数检波器设计,并进行了逻辑仿真和水下静态试验.结果表明,基于CPLD的计数检波器设计功能正确,具有一定的柔性和可升级性;起到检波和滤波的双重作用,提高了电路的抗干扰能力;并且通过在整形电路中增加限幅放大器,可以进一步提高计数检波器的性能. In order to improve the demodulator's working performance of the underwater active acoustic detecting device, a count demodulator was put forward which could overcome the disadvantages of traditional diode envelope demodulator and differentiate between the disturbing signal and the echo signal by counting the pulse numbers of input signal in 1ms. On the Xilinx foundation series 3. 1 software platform, the count demodulator based on CPLD (Complex Programmable Logic Device) was designed with VHDL (Very high speed IC Hardware Description Language) by the top-down method. Furthermore the logic simulation and underwater static experiment were completed. The results show that the count detector based on CPLD has the advantages of accurate functions, good flexibility and upgrade characteristic, double functions of demodulator and filter, and anti-interference ability. In addition, the count demodulator's performance can be further improved by adding a slicing amplifier in the wave-shaping circuit.
出处 《测试技术学报》 2006年第3期201-204,共4页 Journal of Test and Measurement Technology
基金 武器装备预研基金资助项目(51405020304BQ0218)
关键词 主动声探测仪 检波器 计数 CPLD VHDL active acoustic detecting device demodulator count CPLD VHDL
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