摘要
为实现高速弹丸信号采集,提出了利用CPLD与高速A/D转换芯片相结合,设计高速高灵敏度的CCD信号采集电路;根据线阵CCD的工作时序和A/D转换速率要求,采用MAX+plus II的图形编译软件自行设计高速线阵IL-E2 CCD芯片内部时序,并结合AD9224芯片特点设计与CCD芯片接口的外围驱动与采集电路,采用LVDS技术进行信号传输,消除传输中干扰信号;实验证明:逻辑芯片经驱动后输出的波形与IL-E2 CCD采集信号所需的时序吻合,信号采样率达20 MHz.
The CCD signal acquisition circuit with high speed and high sensitivity is designed based on the combination of CPLD with high-speed A/D conversion chipset to gather the signals of high-speed pills. According to the requirements of CCDs uorking sequence and A/D converting rate,the interior sequence of the high-speed linear IL-E2CCD chipset is designed by using Graphic Editor of MAX＋plusⅡ. Combined with the characteristics of AD9224, the periphery driving and signal acquisition circuit interfaced with CCD chipset is designed. Disturbing signals are eliminated during signal transmission by means of LVDS technology. Experimental results show that the waveform of CPLD is consistent with the waveform of IL-E2CCD,and that the signal acquisition rate is 20MHz.
出处
《西安工业学院学报》
2006年第2期136-141,共6页
Journal of Xi'an Institute of Technology
关键词
CCD
逻辑时序
驱动电路
采集电路
CCD
logical sequence
driving circuit
acquisition Circuit
