基于快速舍入的双精度浮点乘法器的设计

A Double Precision Floating-Point Multiplier with Fast Rounding Method

文章设计了一个基于快速舍入的双精度浮点乘法器。它通过预测和选择实现快速舍入,克服了传统舍入方法舍入模式单一、舍入逻辑复杂、硬件开销大等不足,显著地提高了浮点乘法器的性能。该浮点乘法器采用四级流水线,在0.18!mCMOS工艺下综合实现,关键路径延迟为3.15ns。

A double-precision Floating-point multiplier with fast rounding method is presented in the paper. The method can overcome the disadvantages of the conventional rounding method such as the simple RN rounding mode, complicated rounding logic and large hardware consumption, and can optimize the performance of the multiplier greatly through prediction and selection of the rounding digits. The delay of the critical path is 3.15ns when the multiplier is divided into 4-stage pipeline and implemented with 0.18 um CMOS technology.