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应用于OFDM系统中的高速FFT处理器设计 被引量:1

A High Speed FFT Processor Design Based on OFDM System
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摘要 针对无线城域网中工作在2GHz^11GHz频带的IEEE802.16a标准,在实现其OFDM系统时提出一种高速而且经济的FFT处理器设计方案。设计中采用了Radix-4的频率抽取算法和并行的蝶型计算单元结构,而且将旋转因子预先存储在ROM中以提高处理器运行的速度。设计方案采用了单个蝶型运算单元以达到控制FFT处理器规模的目的。数据的输入与输出都共用一个存储器,这进一步节约了硬件资源损耗。 To meet the requirements of IEEE802.16a which operates in the 2GHz to 11GHz Wireless Metropolitan Area Network (wireless MAN), an implementation method of high - speed and efficient FFT processor for OFDM systems is propoeed. This design ks based on radix- 4 decimation- in - frequency algorithm and parallel butterfly structure, Accelerated processing is obtained by pre - store twiddle factor in ROM. Furthermore, single butterfly processing element is employed to control FFT processor scale. Shaxe of memory by data input and output leads to further improvement of hardware resource utilization.
作者 陶金 李林森
出处 《计算机技术与发展》 2006年第6期116-118,共3页 Computer Technology and Development
关键词 IEEE802.16a标准 正交频分复用 快速傅里叶变换 并行蝶型单元 IEEE802.16a orthogonal frequency division multiplexing fast Fourier transform parallel butterfly processing element
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