一种流水型40 MSPS高速采样保持器

A 40 MSPS Pipelined Sample-and-Hold Circuit

通过理论分析和实验仿真,提出了一种流水型高速采样保持器电路(S/H)。采用4个采样率为10 MSPS的S/H,构成一个流水型电路结构的S/H,采样率达到40 MSPS。文章提出的电路结构,在一定程度上解决了采样速率与精度的矛盾关系,可以在组合S/H精度等同于单个S/H精度的前提下,将组合S/H采样速率提高到单个S/H的数倍。

Through theoretical analysis and experimental emulation, a pipelined high-speed sample-and-hold circuit with 2 MHz sinewave sampled at 40 MHz is presented. The pipelined circuit is made up of four 10 MSPS sample-and-hold amplifiers, The new S/H circuit can solve, to a certain extent, the conflict between sampling rate and accuracy, The structure can improve sampling speed while maintaining stable sampling accuracy.