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一种用于ECC密码体制的模乘器设计 被引量:1

Design of a Modular Multiplier for ECC Cryptosystem
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摘要 提出了一种基于Montgomery算法的模乘器。与现有结构相比,由于采用了多级流水线的乘法器结构,提高了系统的时钟频率;并通过引入预计算单元,解决了流水线停顿的问题,提高了系统的并行性,减少了所需的时钟数。该模乘器位长233位,基于SMIC 0.18μm最坏工艺的综合结果表明,电路的关键路径最大时延为3.8 ns,芯片面积2 mm2。一次模乘计算只需要108个时钟周期,适合ECC密码体制的应用要求。 A modular multiplier for ECC cryptosystem based on modified Montgomery algorithm is presented. Compared to other designs, our multiplier is pipelined to enhance the clock frequency. And a pre-calculation mechanism is adopted to solve the problem of pipeline break, hence reducing total clock cycles needed. With its small area and fast speed, our design is perfect for application of ECC crypto-system.
出处 《微电子学》 CAS CSCD 北大核心 2006年第3期344-346,351,共4页 Microelectronics
基金 国家自然科学基金资助项目(60276016 60476015) 清华大学校基础研究基金资助项目(JC2003059)
关键词 蒙哥马利算法 模乘器 ECC RSA Montgomery algorithm Modular multiplier ECC RSA
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参考文献6

  • 1IEEE P1363, Standard specifications for public key cryptography [S]. 2000.
  • 2Montgomery P L. Modular multiplication without trial division [J]. Mathematics of Computation, 1985, 44(170):519-521.
  • 3李树国,周润德,冯建华,孙义和.RSA密码协处理器的实现[J].电子学报,2001,29(11):1441-1444. 被引量:17
  • 4Wu C H, Hong J H, Wu C W. RSA crypto-system design based on the chinese remainder theorem [A].Proc Asia South Pacific Design Automation Conf[C].New York:IEEE Press, 2001. 391 - 395.
  • 5McIvor C, McLoone M, McCanny J V. A high-speed low latency RSA decryption silicon core [A]. Proc the 2003 IEEE Int Syrup Circ and Syst [C]. New York:IEEE Press, 2003. 133-136.
  • 6刘强,马芳珍,佟冬,程旭.基于新型脉动阵列的RSA密码处理器[J].北京大学学报(自然科学版),2005,41(3):495-500. 被引量:2

二级参考文献16

  • 1Guo Jyhhuei,Proc IEEE Int Symposium on Circuits and Systems,1999年,I-504-I-507页
  • 2Yang Chingchao,IEEE Transactions on Circuits and Systems II,1998年,45卷,7期,908页
  • 3McIvor C, McLoone M, McCanny J, et al. Fast Montgomery Modular Multiplication and RSA Cryptographic Processor Architectures. In: 37th Asilomar Conference on Signals, Systems, and Computers. New York: IEEE press, 2003, 1:379-384.
  • 4Rivest R L, Shamir A, Adleman L. A Method for Obtaining Digital Signatures and Public-Key Cryptosystems. Communications of the ACM, 1978, 21(2):120-126.
  • 5Menezes A J, Oorschot P C van, Vanstone S A. Handbook of Applied Cryptography. CRC Press Series on Discrete Mathematics and Its Applications. Boca Raton: CRC Press, 1997, 285-291.
  • 6Montgomery P L. Modular Multiplication Without Trial Division. Mathematics of Computation, 1985, 44(170):519-521.
  • 7Walter C D. Systolic Modular Multiplication. IEEE Transactions on Computers, 1993, 42(3):376-378.
  • 8Wu Chung-Hsien, Hong Jin-Hua, Wu Cheng-Wen. RSA Cryptosystem Design Based on the Chinese Remainder Theorem. In:Proceedings of the 6th Asia and South Pacific Design Automation Conference (ASP-DAC 2001).New York:IEEE Press, 2001, 391-395.
  • 9Blum T, Paar C. Montgomery Modular Exponentiation on Reconfigurable Hardware. In: 14th IEEE Symposium on Computer Arithmetic (ARITH-14). New York: IEEE press, 1999, 70-77.
  • 10Shand M, Vuillemin J. Fast Implementations of RSA Cryptography. In: Proceedings of the 11th IEEE Symposium on Computer Arithmetic. New York: IEEE press, 1993, 252-259.

共引文献17

同被引文献11

  • 1陈勇涛,段成华.一种适合ECC的三级流水模乘加单元设计[J].微电子学与计算机,2009,26(2):122-126. 被引量:2
  • 2刘强,马芳珍,佟冬,程旭.基于新型脉动阵列的RSA密码处理器[J].北京大学学报(自然科学版),2005,41(3):495-500. 被引量:2
  • 3赵忠民,林正浩.一种改进的Wallace树型乘法器的设计[J].电子设计应用,2006(8):113-116. 被引量:12
  • 4McIvor C, McLoone M, McCanny J V. A High-Speed Low Latency RSA Decryption Silicon Core [ C ]//Proceeding of the 2003 IEEE Int Symp C irc and Syst. New York : IEEE Press, 2003,4 : 133 - 136.
  • 5Sakiyama K, Mentens N, Batina L. Reconfigurable Module Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems [ J ]. Int' 1 Workshop Applied Reconfigurable Computing,2006,56 ( 9 ) :34-7-357.
  • 6谈飞洋.高速ECC算法协处理器的设计[D].西安:西安电子科技大学,2009,42-45.
  • 7Montgomery P L. Modular Multiplication ithout Trialdivision [ J ]. Mathematics of Computation,1985,44(170) :519-521.
  • 8Manzoul M A. Parallel CLA Algorithm for Fast Addition[ C]//Proc Intl Par Comput EE Conf. New York:IEEE Press,2000:55-58.
  • 9Seidel P M,McFearin L,Matula D W. Binary Multiplication Radix -32 and Radix-256[ C]//15th IEEE Symposium on Computer A- rithmetic( ARITH-15'01 ) ,New York:IEEE Press,2001:23-32.
  • 10Yan Xiaodong, Li Shuguo. Montgomery Multiplier Based on Secondary Booth Encoded Algorithm[ C ]//Proceeding of 2007 In- ternational Conference on ASIC,New York:IEEE Press,2007 : 197 -200.

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