一种低相位噪声2~N分频器的设计

Design of a Very Low Phase Noise 2~N Frequency Divider

介绍了一种低相位噪声2N分频器的设计。该电路采用0.35μm BiCMOS SiGe工艺制作。1 kHz频偏下的相位噪声为-150 dBc/Hz,大大低于传统的分频器;在-55~125℃温度范围内,电路的工作频带为20 MHz^2.4 GHz,功耗电流约40 mA。数据输入端S0、S1、S2控制电路的分频比在21~28间变化,数据输入端与TTL/CMOS电平兼容。

A very low phase noise 2^N frequency divider is presented. Fabricated with 0.35 μm BiCMOS SiGe process, the circuit has a phase noise of -150 dBe/Hz at 1 kHz offset, which is much lower,compared with the conventional frequency divider. It features wide frequency range （from 20 MHz to 2.4 GHz） and low power consumption （about 40 mA）. The control inputs, S0,S1 and S2, select the division ratio in the range between 2^1 to 2^8. And the data inputs are CMOS or TTL compatible.