基于FPGA的扩频基带处理器中数控振荡器设计

A Numerically Controlled Oscillator Applied to DSSS Baseband Processor Implemented with FPGA

扩频无线通信以其带宽大、抗干扰能力强等优点,逐渐取代了原来的窄带、模拟系统,成为铁路通信的发展方向,扩频基带处理器是其重要的组成部分。本文介绍了一种基于FPGA的扩频基带处理器的结构和基本原理,阐述了实现数控振荡器NCO(Numerically Controlled Oscillator)所使用的迭代算法,并对仿真结果进行了分析说明。采用Verilog硬件描述语言,在Quartus II软件平台上实现了扩频通信基带处理器的数控振荡器设计。仿真和综合结果表明该算法设计思路正确,相对于传统的查表算法,具有占用资源少、结构简单、输出精度高,控制灵活和易于实现等特点。该方法已在扩频基带处理器中得到应用。

The spread spectrum replaced the original narrowband and analog communication gradually with its broad band and anti-jamming capability. It leads the direction of the railway communication. The DSSS（Direct Sequence Spread Spectrum） baseband processor is its important segment. A numerically controlled oscillator applied to The DSSS baseband processor is presented. The structure is based on iterative algorithm, and the whole digital system is implemented with FPGA. The simulation result is shown and analyzed in this paper. The algorithm is designed in verilog HDL. The design tools we used are ALTERA quartus Ⅱ 4.0. Results from simulation and synthesis indicate that the implementation has the advantage of occupying less resources, simple structure, high precision, flexible controlling and easy implementation. As compared with NCO based on look-up table, it is easier for implementation with FPGA. This kind of NCO has been used in theDSSS baseband processor.