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基于ASIC技术的Turbo码的硬件实现

Turbo Codes' Hardware Realization Based on ASIC Chip
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摘要 讨论了WCDMA系统中信道编码原理,提出了一种Turbo码译码的硬件实现方法,使用了Verilog HDL语言设计与编程,利用了activeHDL中实现了软件仿真。同时在CPLD器件上进行了硬件仿真,并给出了仿真结果。 This paper discusses the basis principle of channel coded in WCDMA system. A kind of hardware realization method about Turbo decode has put forward . Verilog HDL and ActiveHDL are applied to program and software simulation. It gives out the simulation results with Programmable Logic Devices in the end.
出处 《江西科学》 2006年第3期238-241,261,共5页 Jiangxi Science
关键词 Turbo编/译码器 Max—Log—MAP算法 VERILOG硬件描述语言 WCDMA Turbo code/decode, Max- Log- MAP arithmetic, Verilog HDL, WCDMA
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参考文献4

  • 1Berrou C, Galavieux A, Thitimajshima P. Near Shannon limit error- correcting coding and decoding: Turbo - codes : Turbo - codes [J]. IEEE International Conference on Communication, 1993,1064 - 1070.
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  • 4Jinhong Yuan, Branka Vucetic, Wen Feng. Combined Turbo Codes and Interleaver Design [J]. IEEE Trans.on Communications, 1999,47 (4):484-487.

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