高速RS译码器的FPGA实现

Implementation of High-Speed RS Decoder Based on FPGA

详细描述了RS译码器的结构及设计;并采用FPGA技术实现了高速RS译码器。测试表明,其最高传输速率可达100MB／s。该译码器可满足高码率传输需求的场合。

In this paper, the structure and design of RS decoder is described, and high-speed RS decoder has been implemented by using FPGA technology. The experimental results show that the max transfer rate is 100MB/s, and the decoder can meet these applications of high-code rate.