基于FPGA的PCI接口控制器设计与实现

PCI Interface Implementation Using FPGA Devices

给出了一种基于FPGA实现PCI总线接口控制器的设计方案,从而解决了视频码流高速传输问题,使视频解码芯片能够实时解码。设计在ModelSim环境下对VerilogHDL源程序进行前仿真,在XilinxISE环境下进行逻辑综合、布局布线后下载到Xilinx公司生产的XC2V6000芯片内。在驱动和应用程序的配合下,FPGA实验板在33MHz时钟频率下,视频数据传输率达到42MB/s,数据传输效果很好,完全符合PCI总线的要求,为能够实时解码提供了高速码流。

A PCI interface controller design with FPGA is proposed to account for high speeds transfer of video streams, achieving real time decoding in the video decoder chip. Simulated on the ModelSim platform, synthesized and implemented on the Xilinx ISE platform, a general state-machine model is evaluated based on a product of Xilinx FPGA XC2V6000. With corresponding driver and software program, the data transfer rate reaches as high as 42MB/s at the 33MHz clock frequency. The data transmission result is good enough to meet the demands for PCI bus, thus achieving high speeds flow for real time decoding.