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并行离散事件模拟系统容错功能设计 被引量:1

Design on Fault Tolerance of Parallel Discrete Event Simulation System
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摘要 基于时间偏差的并行离散事件模拟是提高模拟速度的有效手段,其通用系统实现结构是分布式逻辑进程模拟结构。提出了在并行离散事件模拟系统中实现容错功能的基本框架,并针对系统本身特点对容错框架各个方面的实现方案给予描述。 Parallel discrete event simulation based on TW is an effect method to improve the speed of simulation, it' s common imnlementation structure is distributed logic process structure. This paper come up a fault tolerance framework within the parallel discrete event simulation system and give the implementation plan description of this framework.
出处 《计算机应用研究》 CSCD 北大核心 2006年第8期69-71,共3页 Application Research of Computers
基金 上海应用材料研究发展基金资助项目(0215)
关键词 并行离散事件模拟 TIME WARP 分布式逻辑进程模拟结构 容错 Parallel Discrete Event Simulation Time Warp Distributed Logic Process Structure Fault Tolerance
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参考文献5

  • 1D Jefferson. Virtual Time [ J ]. ACM Transaction on Programming Languages and Systems, 1985,7 ( 3 ) :404- 425.
  • 2H Avril, C Tropper. Clustered Time Warp and Logic Simulation[ C].Proc. of the 9th Workshop on Parallel and Distributed Simulation,1995.12-119.
  • 3Avritzer A, Weyuker E J. Detecting Failed Processes Using Fault Signatures [ C ]. IEEE International Computer Performance and Dependability Symposium, Urbana-Champaign, Illinoise, 1996.302-311.
  • 4A Gafni. Rollback Mechanisms for Optimistic Distributed Simulation Systems[ J ]. Proceedings of the SCS Multi-conference on Distributed Simulation, 1988,19( 3 ) :61-67
  • 5D W Glazer, C Tropper. On Process Migration and Load Balancing in Time Warp [ J ]. IEEE Transaction on Parallel and Distributed Systems, 1993,14(3) :318-327.

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