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千兆以太网卡芯片数模转换电路的设计与实现 被引量:1

Design and implementation of DAC circuit for gigabit ethernet chips
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摘要 给出了6bit分辨率、10bit精度的千兆以太网卡芯片数模转换电路,包括体系结构设计、电路设计与仿真、版图设计.该数模转换电路经过TSMC0.13μm1P8MCMOS工艺验证,工作电压为1.5V/2.7V.芯片测试结果表明该数模转换电路能够满足千兆以太网卡芯片的性能要求. A digital to analog converter (DAC) circuit, including the system architecture, circuit design and simulation and chip layout, for gigabit Ethernet chips with a resolution of 6 bit and an intrinsic accuracy of 10 bit was designed. The circuit was verified through TSMC 0. 13μm 1P8M process with a power voltage of 1.5 V/2.7 V. The test results showed that the requirements for gigabit Ethernet IC are met by the circuit.
出处 《华中科技大学学报(自然科学版)》 EI CAS CSCD 北大核心 2006年第7期74-75,103,共3页 Journal of Huazhong University of Science and Technology(Natural Science Edition)
关键词 数模转换电路 电流舵 热温度计码 DAC (digital to analog converter) current steering thermometer code
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  • 1Hatamian M, Agazzi O E, Creigh J, et al. Design considerations for gigabit Ethernet 1000BASE-T twisted pair transceivers[C]//IEEE ed. IEEE 1998 Custom Integrated Circuit Conference. [s. l.]:IEEE, 1998: 335-342.
  • 2Baker R J, Li H W, Boyce D E. CMOS circuit design, layout, and simulation[M]. New York; IEEE Press, 1998.
  • 3Bastos J, Marques A M. A 12-bit intrinsic accuracy high-speed CMOS DAC[J]. IEEE Journal of Solid-State Circuits, 1998, 33(12); 1 959-1 969.
  • 4Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications.IEEE 802.3, 2002.

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