密码处理ASIP中的置换加速

Permutation Speedup on ASIP for Cipher Processing

密码处理ASIP是针对密码算法处理的专用微处理器体系结构,结构设计的重点是怎样良好地匹配算法要素和算法结构。置换是对称密码算法中重要的编码环节,在密码处理ASIP结构下加速置换要尽量减少使用非共用硬件,开发处理并行性,适应各种位宽置换的处理要求。通过对分组算法置换特性的深入分析,在提出的密码处理ASIP结构下,构造了加速置换操作的部件结构和互连结构,设计了专用的指令,给出了性能和实现结果,证明置换加速机制高效、低代价、通用性强。

The ASIP for cipher processing is a special architecture which can speed up cryptograph algorithms. How to match the ASIP architecture to operation essentials and the characteristics of various algorithms is an emphasis in encoding. Sharing hardware with other operations to improve the permutation of various granularities is an efficient design choice. The characteristics of permutation are analyzed and the architecture of a cipher processing ASIP is proposed. The components and interconnection structures are built for permutation processing and special instructions are proposed. The performance and the implementation cost are analyzed and compared with other implementations. The results show that the permutation architecture and implementation are efficient and cost-effective.