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用积累型MOS变容管实现的2.4GHz0.25μm CMOS全集成压控振荡器 被引量:1

2.4GHz Fully Integrated VCO with Accumulation MOS Varactors in 0.25μm COMS Process
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摘要 基于TSMC0.25μmCMOS工艺,将一个普通MOS管改进为工作在积累区的MOS变容管,实现了一工作于2.4GHz的全集成压控振荡器(VCO)。测试结果表明,采用积累型MOS变容管的VCO具有较大的调谐范围。在2.5V工作电压下,控制电压从0~2.2V,VCO的频率调节范围为2.210~2.484GHz,在2.4GHz时相位噪声为-105dBc/Hz@600kHz,输出功率为-7.55dBm,电流损耗为7mA。芯片面积约为0.35mm^2。 A conventional MOS transistor is modified to an accumulation-mode MOS varactor. A 2.4GHz fully integrated voltage controlled oscillator (VCO) is designed based on 0.25μm COMS Process. The measurements performed on a bare-chip, powered by a 2.5V supply, shows that the oscillation frequency can be varied in the range 2. 210 -2. 484GHz, the phase noise at offset of 600KHz from a 2.4GHz carrier is -105dBc/Hz, and output power is -7.55dBm,with 7mA current consumption.
出处 《微波学报》 CSCD 北大核心 2005年第B04期104-106,共3页 Journal of Microwaves
基金 上海市科委PDC专基金计划资助项目(编号: 017015030)
关键词 CMOS 压控振荡器(VCO) MOS变容管 CMOS, VCO, MOS varactor
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参考文献6

  • 1Morifuji E,Momose H S,Ohguro T.Future perspective and scaling down roadmap for RF CMOS.Symposium on VLSI Circuits Digest of Technical Papers,1999,163~164
  • 2Larson L E.Integrated circuit technology options for RFICs-persent status and future directions.Custom Integrated Circuits Conference,1997:169~176
  • 3Soorapanth T,Yue C P,Shaeffer D R,et al.Analysis and optimization of accumulation-mode varactor for RF ICs.1998 Symp VLSI Circuit Dig Tech.Papers,1998,32~33
  • 4Castello R,Erratico P,Manzini S,et al.A 30% tuning range varactor compatible with future scaled technologies.1998 Symp VLSI Circuit Dig Tech Papers,1998:34~35
  • 5Fong N,Tarr G,Zamdmer N,et al.Accumulation MOS varactors for 4 to 40 GHz VCOs in SOI CMOS.IEEE Int.SOI Conf,2002:158~160
  • 6Maget J,Kraus R,Tiebout M.A physical model of a CMOS varactor with high capacitance tuning range and its application to simulate integrated VCOs.IEEE Solid-State Electronics,2002,46:1609~1615

同被引文献7

  • 1陈继新,洪伟,严蘋蘋,殷晓星,程峰.800MHzCMOS低噪声放大器的设计[J].微波学报,2005,21(B04):107-111. 被引量:5
  • 2Behzad Razavi Member,Kwing F Lee Member,Ran H Y.Design of high-speed low-power frequency dividers and phase-locked loops in deep submicron CMOS[J].IEEE Journal of Solid State Circuits,1995(2):101-109.
  • 3Wang HongMo.A 1.8 V 3 mW 16.3 GHz frequency divider in 0.25 μm CMOS ISSCC 2000[J].Frequency Sysnthesizers and dividers,PAPER TP,2000,12:196-197.
  • 4Byungsoo Chang,Joobae Park,Wonchan Kim.A 1.2 GHz CMOS dual-modulus prescaler using new dy-namic D-type flip-flops[J].IEEE Journal of Solid-state Circuits,1996,31(5):749-752.
  • 5Lehmann T,Classia M.1 V power supply CMOS cascode amplifier[J].IEEE J Solid-State Circuits,1996,31(5):749.
  • 6曾晓军,李天望,洪志良.1V,19GHz CMOS分频器设计[J].Journal of Semiconductors,2003,24(4):416-420. 被引量:7
  • 7窦建华,钱立旺,王志功,梁帮立.0.6μm CMOS静态分频器电路设计[J].电气电子教学学报,2004,26(1):35-37. 被引量:7

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