嵌入式块编码的快速算法和结构

Fast algorithm and architecture for embedded block coding

为了更加有效地解决JPEG2000位平面编码算法实现的低效问题,提出了一种快速的基于字级顺序的嵌入式块编码方法。新的编码方法采用对样本的编码通道预测和样本的上下文形成并行流水线执行的技术,实现了对一个子块系数的所有位平面多通道编码的一次扫描顺序完成。提出了一种新的实现字级顺序且多字并行的高速结构,能够在一个时钟周期同时执行对一个条带列4个系数的上下文形成,完成对一个N×N子块系数的上下文形成只需大约N2/4个时钟周期。理论分析和实验结果表明,新的结构比较同类最新设计具有更快的数据处理能力和良好的加速比成本的性能。

To solve the problem of inefficiency of implementing embedded block coding in JPEG 2000, a novel fast algorithm to achieve word-level sequential and parallel bit plane coding （BPC） was proposed. The proposed BPC algorithm adopted a technique of performing the coding pass prediction and context formation as parallel and pipelined fashion. By using this BPC algorithm, the coefficients bit modeling for all bit planes in a code block were completed as parallel and sequential mode by one scan. Based on this new coding algorithm, an efficient high-speed architecture （HSA） was pre- sented, which could perform context formation for 4 coefficients belonging to the same stripe column at one intraclock cycle, and achieve context formation for an N× N code-block in approximate N ^2/4 intra-clock cycles. Theoretical analysis and experimental results demonstrate that, the proposed HSA could significantly increase throughput rate with good performance in terms of speedup to cost, compared with the up-to-date design.