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IO单元自动排布算法IOAP 被引量：1

IOAP:An Algorithm for IO Cell Automatic Placement
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摘要 提出了一种应用于芯片物理设计过程中IO单元自动排布的新算法。IO单元排布是芯片物理设计过程中长期依赖经验的环节。IO单元排布的优化对布线,电源网格和设计收敛性的优化有很大贡献。文章重点研究边缘IO单元排布,提出了IO单元自动排布算法(IOAP)。此算法及其相关软件直接应用于视频解码芯片和无线传感器网络处理器芯片(已流片成功)的物理设计流程中。结果表明,IOAP有效改善了芯片的电源网格,时序和布线结果,减少了布线努力,提高了设计收敛性。 A novel algorithm for automatic I/O cell placement is presented. Initial I/O placement has a great effect on the final solution. Optimized I/O placement will contribute to routing,power grid and design convergence. This work is focused on peripheral I/O designs that fit most wire bond packages. A novel automatic I/O cell placement algorithm,IOAP （I/O automatic placement） , is put forward. Experiments were conducted on a video decoder chip and a wireless network processor chip. Results show that the routing effort, IR drop,timing and total net length are comprehensively optimized.
作者 侯立刚 谢通 李茉 吴武臣
机构地区 北京工业大学VLSI及系统集成实验室
出处 《微电子学》 CAS CSCD 北大核心 2006年第4期428-431,436,共5页 Microelectronics
基金 北京市自然科学基金资助项目(BNSF4022002)
关键词 集成电路设计 边缘I/O 自动排布 电源网格 IC design Peripheral I/O Automatic placement Power grid
分类号 TN402 [电子电信—微电子学与固体电子学]
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参考文献6

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同被引文献7

  • 1TAKAI Y, FUJITA M, NAGATA K, et al. A 250 Mb/ s/pin 1 Gb double data rate SDRAM with a bi-directional delay and an inter-bank shared redundancy scheme [C]// IEEE Int Sol Sta Circ Conf. San Francisco, CA, USA. 1999: 418-419.
  • 2HUANG C-H. Design and analysis of SSTL_2 I/O buffer for DDR applications [M]. Hsin-Chu: National Chiao-Tung University, 2005: 24-60.
  • 3RAZAVI B. Design of analog CMOS integrated circuits [M]. New York: McGraw-Hill Education, 2001: 121-131.
  • 4KER M-D, CHUANG C-H. ESD protection design for high-speed I/O interface of stub series terminated logic (SSTL) in a 0. 25-μm salicided CMOS process [C] // Proc IEEE 11^th IPFA. Taipei, China. 2004: 217-220.
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  • 6JESD8-9B, Stub series terminated logic for 2. 5 V (SSTL_2) [S].
  • 7SAKATA T, MORITA S, NAGASHIMA O, et al. A DDR/SDR-compatible SDRAM design with a threesize flexible column redundancy [C] // IEEE Symp VLSI Circ. Honolulu, HI, USA. 2000: 116-119.

引证文献1

微电子学
2006年 第4期

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