一种新的锁相环自调谐方案

A Novel Scheme of Self-Tuning for Phase Locked Loop

提出了一种用数字和模拟电路的方法实现宽调谐范围，减小VCO增益的方案。该方案将宽调谐范围分成一系列相互重叠的子带，用数字调谐电路来设置安排正确的子带频率，结合模拟调谐，锁相环（PLL）能锁定到正确的频率值。深入讨论了方案的具体实现及相关问题，并实现了一个调谐范围为1．7～2．1GHz，控制位为5位的自调谐锁相环。Spectre Verilog仿真表明，电路能够有效地工作，在20μs内完成自调谐，并自动切换到模拟调谐，且能工作在复位自调谐和信道切换自调谐两种工作模式，适合应用在全集成、宽调谐范围的VCO锁相环中。

A novel self-tuning scheme is proposed,in which a wide tuning range is realized by digital and analog tuning circuit to reduce VCO gain. The digital tuning scheme divides a wide tuning range into many smaller bands, and self-tuning circuit is used to assign proper subband for a given channel frequency, so that PLL can be locked to proper frequency when combined with analog tuning circuit. A self-tuning PLL with a tuning range from 1.7 GHz to 2. 1 GHz and 5-bit control word was implemented based on the proposed scheme. SpectreVerilog simulation shows that the circuit can operate effectively and quickly self-tune to the proper frequency range in 20 μts, and then switch to analog tuning process. Operating at reset self-tuning or channel switching self-tuning mode, the circuit is also applica- ble for PLL with a fully integrated wide-range VCO.