基于2-5混值编码的十值乘法器

Ten-Valued Multiplication Based on 2-5 Mixed-Valued Coding

通过对十值逻辑编码技术的研究,发现2-5混值编码方案能有效抑制冗余态,使一位十值信号的编码效率达到100%。提出了2-5混值编码方案,借助T运算,推导出2-5混值/十值T门的逻辑函数表达式及电路结构;根据真值表,利用T门,设计了2-5混值/十值乘法器。在PSP ICE 9.0环境下,采用0.5μm CMOS工艺,对所设计的电路进行计算机模拟,验证了其逻辑功能的正确性。

This paper finds out the 2-5 mixed-valued coding method can effectively restrain redundant states, and obtain 100% coding efficiency for one bit ten-valued signal by studying ten-valued logic coding technique. First the 2-5 mixed-valued coding method is proposed. The function expression and circuit structure of 2-5 mixed-valued/ten-valued T gate are derived using T operations. Then, the 2-5 mixed-valued/ten-valued multiplication is designed using the truth tables and T gates. Finally, the above designed circuits are simulated in the computer by PSPICEg. 0 using 0.5 μm CMOS technology. The results prove that the designed circuits have correct logic functions.