FPGA最小延时工艺映射理论及算法

THE TECHNOLOGY MAPPING THEORY ALGORITHM FOR MINIMAL DELAY IN LUT BASED EPGA DESING

本文以动态规划和网络流理论为基础，提出一种新的求解基于ＬＵＴ结构的ＦＰＧＡ工艺映射算法，并证明了它能获得最小延时目标电路。

Based on the dynamic programming and the theorem of network flow, this paper presents a new technology mapping algorithm for delay optimization in LUT-based FPGA design in polynomial time. It is proved that the algorithm can minimize the delay in the target circuit. Its theoretical results are better.