摘要
本文采用我国首创的ＤＹＬ集成线性“与或”门设计成的中值滤波电路，该电路具有结构简单、延时小等优点，可用于实时信号处理。
In this paper, the median filter circuit is designed by use of DYL integrated liner 'AND-OR'gates, this kind of median filter circuit has the advantages of simple structure, short delay time, and can be used for real-time signal processing.
出处
《微电子学与计算机》
CSCD
北大核心
1996年第5期5-7,共3页
Microelectronics & Computer
关键词
中值滤波电路
设计
逻辑电路
DYL, Intergrated liner ' ANDOR' gates, Median filter
