基于FPGA的TDM FIR数字滤波器的设计及硬件实现

Design and Hardware Realization of a Time-Domain Multiplexing(TDM) FIR Digital Filter Based on FPGA

介绍了一种可实现对高速率、高采样率信号进行实时处理的滤波器———TDM(Time-DomainMultiplexing)FIR数字滤波器的设计方法,并且给出了一个32阶的高速实时TDM FIR数字滤波器的软件仿真及硬件实现过程。

This paper introduces a method for designing a TDM （Time -Domain Multiplexing） FIR digital filter that can carry out real time process of the high speed rate and high sample rate signal, and gives the steps of software simulation and hardware realization of the high speed and real time TDM FIR digital filter with 32 ranks.