基于Verilog-HDL的逻辑分析卡中双向端口的设计

Design of Bidirectional Port Based on Verilog-HDL in Logic Analysis Card

介绍了自行设计逻辑分析卡的系统构成,给出各个功能模块的逻辑框图。然后,从应用的角度简单介绍了ISSI公司的静态RAM芯片IS61LV256,并阐明了将其作为逻辑分析卡外部RAM的使用方法,设计了该RAM与CPLD的硬件接口。应用Verilog-HDL语言对双向(inout)端口所进行了描述,在此基础上以一个简化了的双向(inout)端口模块为例,设计了对该双向(in-out)端口的仿真方法,并给出了仿真结果。最后给出一种简易的硬件测试方法对双向(inout)端口进行测试,证明了该设计以及对其的仿真的正确性。

This paper firstly introduced the systemtic composition of logic analysis card, which is designed independently, and attached the logic frame diagram of each module. Then from application angle, it also illustrated the static state RAM chip IS61LV256 produced by ISSI, and how to use this chip for the external memory storage of logic analysis card. Hardware interface between this RAM and CPLD was designed, which was described and emulated by VerilogHDL. Finally, a kind of simple hardware test method was given, to justify the correctness of this design and emulation.