摘要
本文介绍的ChannelCore64使设计者能够用一个可对FPGA编程的IP核来替代多达16个DDC(直接下变频器)ASIC,显著地减少了PCB面积,降低了功耗而且增加了灵活性。
ChannelCore64 allows designers to replace up to 16 specialist DDC ASIC devices with a single IP core for FPGA, significantly reducing board area, lowering power consumption, and increasing flexibility.
出处
《电子设计应用》
2006年第9期98-99,4+10,共2页
Electronic Design & Application World