摘要
讨论了在SystemC环境下进行SoC的系统级建模过程中处理器模型与调试器的集成方法。分析了两者之间的通信连接方法以及如何保证调试器对模型运行的正确控制以实现周期精确的要求。所提出的通信连接方法都是以调试器与系统模型为两个独立的操作系统进程为前提的,这符合大多数仿真环境的要求。对系统模型与调试器接口部分的结构进行了分析,针对指令流水线造成的单指令运行与时钟周期的同步问题提出了相应的解决方案。
The method to integrate sofhvare debugger with ISS in SoC system modeling in SystemC environment, the communication method between ISS and debugger and how to realize cycle proper running are discussed. The debugger and system model are used as independent operation systems in simulation environment. The structures of sysem model and debgger interface are analyzed. The corresponding solution is suggested to solve the synchronous problem between single instruction running and clock period caused by instruction pipeline.
出处
《华北电力大学学报(自然科学版)》
CAS
北大核心
2006年第5期85-88,共4页
Journal of North China Electric Power University:Natural Science Edition