用于红外图像处理的多级滤波器VLSI结构设计

Design of Multilevel Filter VLSI Architecture for Infrared Image Processing

提出了一种多级滤波器的VLSI硬件实现结构。通过增加多分辨率处理,改善了多级滤波器的滤波效果;使用并行流水结构设计,提高了该滤波器数据运算的吞吐率。使用SMIC的0.35μm单元库设计,芯片面积为6万等效门,工作频率为50MHz,满足红外序列图像的实时滤波要求。

This paper proposes a VLSI architecture of multilevel filter. It improves filtering effect of multilevel filter through adding multiresolution processing. It improves data throughput by using parallel and pipeline structure. The SMIC 0.35μm cell library was used. The implemented filter chip consists of only 50 k gates, operates at 50 MHz and can meet infrared sequence image time processing requirement.