带绝缘槽的SOI RESURF LDMOS的栅电荷分析

Gate Charge Analysis for SOI RESURF LDMOS with Trench

栅电荷提供关于功率MOSFET的电容、驱动需求和开关功耗等信息,是衡量MOSFET性能的主要指标。基于Won-So Son等人提出的SOI基绝缘槽结构LDMOS(TR-LDMOS)的RESURF条件[1],建立器件的栅电荷分析模型,发现TR-LDMOS所需Qgd比普通RESURF LDMOS(LR-LDMOS)少13.85%,所需Qg比LR-LD-MOS少17.65%;完成对密勒电容充电的时间TR-LDMOS要比LR-LDMOS少用50ns。在TR-LDMOS模型基础上,结合仿真对沟道区不同时刻载流子分布的描述,更细致地阐述了功率器件在开启过程中的状态变化;并且应用比较分析的方法,解释无源器件对TR-LDMOS开启的时间和功耗所产生的影响。在降低功率器件开启功耗的原则下,得到有助于器件设计的应用性结论。

This article provides a model for gate charge analysis, which is based on SOI RESURF LDMOS with trench. The results show that the gate charges required by TR - LDMOS are less than that by LR - LDMOS, only 86.15 %. And the required time to charge gate - drain capacitor of TR - LDMOS is 50ns less than that of LR - LDMOS. Based on that model, the turn - on process of power MOSFET is discussed considering the distribution of channel carriers, and also the influences of passive devices on the turn - on time and the power dissipation are explained. From the point of view of device design, a conclusion which is convenient to reduce the power dissipation during turn - on process is educed.