基于ABNF的高速硬件解码方法的研究

The Research on High-Speed Hardware Decoding Based on ABNF

本文提出了一种硬件实现网络协议解码的方法.这种方法采用基于流水线的高速并行字符串匹配结构和基于ABNF(Augmented Backus Naur Form)范式定义的高速域值合法性检查.文中还对用这种方法实现的SIP(Session Initiation Protocol)协议解码器的性能进行了分析,并与软件实现进行了对比.通过比较可以得出,采用本方法所实现的协议解码系统只需要较少的硬件资源就可以得到比传统的软件实现几十倍的性能提高,并显著提高整个系统的吞吐量.

A method to implement high-throughput network protocol decoder using hardware is proposed. Two technologies are used in this method：high speed parallel string match based on pipeline and high speed message validity check based on ABNF （Augmented Backus Naur Form）. The performance of SIP （Session Initiation Proto- col） protocol decoder implemented by this method is also valuated and the comparison with software implementation is made. It can be find out that the network protocol decoder implemented by this method can get an improvement up to tens of times while only relatively little hardware resource is needed and the throughput of the system can be improved dramatically.