摘要
稀疏矩阵向量乘(Sparse M atrix-VectorMu ltip ly,SMVM),形如Ab=x,在科学计算、信息检索、数据挖掘等领域中都是重要的计算核心之一。在基于FPGA实现的SMVM系统中,其底层基本处理单元(Processing E lem ent,PE)的主要功能,是对单精度浮点输入进行乘累加运算。本文针对SMVM算法的特点,提出浮点乘累加PE的设计方案,并在V irtex4LX60上加以实现,工作频率达到123.6MHz。
Sparse Matrix - Vector Multiply, Ab = x, is one of the important kemels in Scientific Computation, Text Retrieval and Data Mining. Under the SMVM system on FPGA, the function of Processing Element is to perform Multiply - Accumulative operation with Single Precision Floating - Point inputs. According to the specified SMVM algorithm, we present the design approach of Floating - Point MAC PE, and implement it on Virtex4 LX60 working at 123.6MHz.
出处
《计算机与数字工程》
2006年第10期165-168,179,共5页
Computer & Digital Engineering
关键词
乘累加
浮点
稀疏矩阵向量乘
FPGA
Multiply - Accumulate, Floating - Point, Sparse Matrix - Vector Multiply, FPGA
