摘要
描述了一种基于FPGA实现的数字通信系统帧同步电路原理,在MAX+PLUSII平台上采用图形设计和VHDL硬件描述语言设计方式设计了数字通信系统帧同步电路,详细说明了关键部分的设计过程,给出了设计的顶层文件和相关的仿真图,整个电路可集成到FPGA芯片中,是实现通信系统的全数字化的基础。
The principle of a frame synchronization in digital communiction based on FPGA is described. Then using MAX ＋ PLUSH, digital communication frame synchronization circuit is designed through VHDL language and graphic editor. The design of key part is elaborated, Top file and correlative simulation figure are presented, The circuit is integreted in chip of FPGA. It is the base of digitization and integration in commmication system.
出处
《信息技术》
2006年第10期42-44,176,共4页
Information Technology
关键词
FPGA
帧同步
VHDL语言
数字通信
FPGA
frame synchronization
VHDL language
digital communication
