FPGA中的I/O时序优化设计

Optimization design of I/O time sequence in FPGA

在数字系统的同步接口设计中,可编程逻辑器件的输入输出往往需要和周围新片对接,此时I/O接口的时序问题显得尤为重要。介绍了几种FPGA中的I/O时序优化设计的方案,切实有效的解决了I/O接口中的时序同步问题。

In the synchronizing interface design of the digital system, the I/O of the FPGA always needs to butt the surrounding chips. In this time, the timing problem of the I/O shows especial importance. The paper introduced several plans those can optimize I/O timing design and also can satisfy the timing require in the I/O interface.