无限冲激响应滤波器的设计与实现

Design and Implementation of Infinite Impulse Response(IIR) Filter

现场可编程门阵列(FPGA)器件以其灵活的可配置特性,可以很好地解决并行性和速度问题在数字信号领域得到广泛地应用,但要求使用VHDL或VerilogHDL语言进行设计的难度较大。本文提出了一种采用FPGA实现无限冲激响应滤波器的设计方案。并以一个四阶低通IIR数字滤波器的实现为例,设计并完成软硬件仿真与验证。结果表明,方法简单易行,能满足设计要求。

In the field of digital signal processing, field programmable gate array （FPGA） design is one of the most important methods for it＇s feature of reconstruction and ISP, the devices are widely used for excellently solving the problem of parallel and speed. Using a modem development technology of DSP （DSP Builder ） implementation for example, the article was mainly about the FPGA design, which was verified in the digital signal process circuit of an fourth order IIR filter.