基于CMOS图像传感器IBIS5-A-1300的时序设计

Design of Time Order Based on CMOS Image Sensor IBIS5-A-1300

在分析CYPRESS公司的IBIS5-A-1300 CMOS时序的基础上,设计了串行、并行两种配置寄存器的模式,完成了多斜率积分、开窗口、亚采样功能。选用复杂可编程器件(CPLD)作为硬件设计载体,使用VHDL语言对驱动时序发生器进行了硬件描述。采用QuartusⅡ5.0软件对所做的设计进行了功能仿真,针对ALTERA公司的CPLD器件MAXⅡ EPM570T144C3进行适配。系统测试结果表明,所设计的驱动时序发生器满足CMOS相机驱动要求。

Schedules of IBIS5-A-1300 （CMOS produced by CYPRESS Co. Ltd） have been examined in detail. Serial-3-wire and parallel have been designed to configure register for CMOS camera, and muhiple integration, ROI, sub-sampling have been completed. Complex program logic device（ CPLD） has been chosen as the hardware design platform, driving schedule generator has been described with VHDL. The function simulation of the system is successfully fulfilled with Quartus Ⅱ 5.0 software and filled into MAX Ⅱ EPM570T144C3 （ a kind of CPLD products that made by ALTERA）. Experiments show that designed generator is suitable for the driving of CMOS camera.