摘要
为了给软件无线电的研究提供一个测试平台,设计实现了一个多数据通道高速互连背板平台.背板平台包括传输母板、时钟分配板和数据通道交换板,并提供ADC,DDC,DSP,DUC和DAC单板接口.通过采用高性能芯片和合理的高速设计方法,实现了背板平台良好的传输误码率和时钟晃动性能以及多个数据通道的自定义总线形式.
To provide a test platform for SDR(software defined radio) research, a multi-channel high-speed backplane interconnection platform was designed and implemented. This platform is composed of an MB (mother board),a CB(clock board) and a SW(switch board) and can provide interfaces for ADC, DDC, DSP,DUC and DAC modules. The measurement show that, by adopting high performance chips and good high-speed design skills this platform can achieve low bit-error-rate and low clock jitter as well as selfdefined bus for multi-channel data communication.
基金
安徽省高校"物理电子学"省级重点实验室资助
关键词
软件无线电
交换板
母板
时钟板
software defined radio (SDR)
switch board (SW)
mother board (MB)
clock board (CB)