基于FPGA的1553B总线接口板设计

1553B Bus Interface Board Design Based on FPGA

基于FPGA的1553B通信网络的多路总线传输接口板,采用FPGA片内实现。通过Verilog程序和调用QuartusII软件内部宏模块完成。包括双冗余曼彻斯特II编解码及串并转换、总线传输逻辑、终端协议和消息处理、内存及控制器及子系统模块。编写Verilog代码时,检测信号采用跳变沿检测而避免电平检测,可提高系统可靠性。

A design of 1553B multi-bus interface board based on FPGA was realized by FPGA chip. The internal FPGA was realized through Verilog code and calling the mega function of Quartus Ⅱ. The architecture of the system is composed of the encoding and decoding of Manchester Ⅱ ＆ series-parallel conversion module, the bus transmission module, the remote terminal protocol and message processing module, the RAM and its controller module and subsystem module. When compiling the Verilog code, the edge of voltage reversal was detected rather than its high or low level to improve the reliability of system.