摘要
误码仪(biterrorratetester,BERT)是数字通信系统性能测试的重要仪器。本文设计的可编程误码仪主要由发端设备和收端设备两部分构成:发端设备主要完成序列产生和时钟产生;收端设备主要完成序列同步和序列比对。误码仪选用了单片机和FPGA作为核心器件,提高它的再升级和可移植能力。本文设计的可编程误码仪具有使用简单、测试内容丰富、误码测试结果显示直观、准确等特点。
BERT, which is short for bit error rate tester, is an important apparatus for the performance test of digital communication system. The BERT that the article talks about mainly consists of two portions, transmit part and receive part. The transmit part basically completes the functions of producing sequence and clock, while the other one chiefly fulfills the functions of synchronizing sequences and contrasting them. Also, the BERT uses SCM and FPGA as its uppermost apparatus in order to advance its abilities of upgrading and transplanting. It has the advantages of simple in use, abundant in test range, intuitionist in viewing the result, etc.
出处
《电子测量技术》
2006年第5期112-114,共3页
Electronic Measurement Technology
