基于FPGA的FIR滤波器设计

The Design of FIR Filter Based on FPGA

在讨论一般FIR数字滤波器设计存在问题的基础上,介绍了现代一种新的DSP设计工具DSPBu ilder.给出了基于FPGA的FIR数字滤波器的实现流程,并以一个32阶的低通FIR数字滤波器为例,采用DSP Bu ilder建立了实现模型.最后,给出了仿真波形、硬件验证方法和实际测量结果.

Based on the discussion of the disadvantage by the general design method of FIR digital filter, this paper introduces the new DSP design tool software, DSP Builder. Then the paper presents the realization process and the implementing model of 32 steps low pass FIR filter established by DSP Builder. The software simulation wave, hardware validating method and practically measured result are showed finally.