数字差分BPSK扩频接收机的设计与FPGA实现

Design and FPGA Implementation of Digital Differential BPSK DSSS Receiver

本文提出了一种全数字差分BPSK扩频接收机的实现方案,通过Simulink仿真验证了该方案具有较低的误码率。然后利用Verilog硬件描述语言编程,通过了综合和仿真验证,最后在Xilinx公司FPGA上实现了整个系统。该系统经过优化设计,具有易于硬件实现,占用芯片资源少等优点,对实际工程有一定的指导意义。

An full digital differential BPSK direct sequence spread spectrum receiver is introduced.A low BER is performed through simulation by Simulink. Further more,the design is optimized to achieve less hardware complexity,and finally implemented on Xilinx VirtexⅡ FPGA XC2V500 using Verilog.The architecture can be used in many different applications.