视频实时采集系统的FPGA设计

The FPGA Design of Real-time Video Acquisition System

设计了一种基于FPGA的视频实时采集系统,视频数据通过视频解码器、双口RAM、内存控制器,然后存入片外SDRAM中。根据视频处理算法的要求和SDRAM的特点,对视频数据的存储格式及读写时序进行了优化,提高了系统的数据传输速率,能够满足后续视频处理系统的需要。

A design of real-time video acquisition system based on FPGA is presented in this paper, video data stream is stored into SDRAM via video decoder, dual-port RAM and SDRAM controller. The system is optimized on the format of the data storage and access timing based on the requirements of video processing algorithms and the characteristic of SDRAM, the system data transfer rate is enhanced and could satisfy the need of following video processing system.