延时估计误差对间接学习结构预失真器的影响

Influence of the time delay estimation error on a predistorter based on the indirect learning architecture

间接学习结构数字基带预失真器的实现需要估计模拟链路延时,而链路延时估计算法存在估计误差,此误差对预失真器性能的影响目前未有相关研究。该文以邻近信道功率比(ACPR)和归一化均方误差(NM SE)两项指标作为衡量标准,研究了延时估计误差对间接学习结构预失真器补偿性能的影响。结果表明,间接学习结构预失真器对延时估计误差敏感,在N yqu ist采样的预失真器系统中,只有当估计误差不超过系统采样间隔的1/64时,才能保证此预失真器能够有效地实现功放线性化。

The analog link delay in a digital baseband predistorter needs to be estimated to implement a predistorter based on the indirect learning architecture. This paper analyzes the influence of the delay estimation error on the performance of the predistorter. The evaluation criteria are the adjacent channel power ratio （ACPR） and the normalized mean square error （NMSE）. The results show that the predistorter based on the indirect learning architecture is sensitive to the delay estimation error. In the Nyquist sampling predistortion system, the effectiveness of the predistorter for linearizing a power amplifier with memory effects can be guaranteed if the delay estimation error is within 1/64 of the sampling interval.