一种新的Booth乘法器设计方法

A new algorithm for design of the Booth-based multiplier unit

文章在分析了数字电路实现乘法运算的基本原理及部分积优化原理的基础上,提出了一种具有动态加速浮点乘法运算功能的变基Booth算法,该算法可以在不增加加法器负担的条件下收到较好的加速效果。在一个普通的2输入加法器的支持下,平均加速效果至少好于8基Booth,而面积和速度都优于前者。同目前集中于乘法器中阵列结构的优化方法相比,该文为乘法器优化设计提出了一种新的研究方向。

High-radix Booth is of great importance for speeding up multiplying by reducing the number of partial products, but it also adds great burdens on the adder of the multiplier in the aspects of timing and area. On the basis of analyzing the theory of multiplication operation in digital circuits and the principle of partial products shrinking, a radix-x Booth algorithm is proposed. It can achieve speeding up multiplying dynamically without burdening the adder, and it is better than a 32 bit mantissa radix-8 floating point multiplier in both area and timing.