电化学电容-电压法表征等离子体掺杂超浅结

Electrochemical Capacitance-Voltage Characterization of Plasma-Doped Ultra-Shallow Junctions

采用电化学电容-电压(ECV)法对等离子体掺杂制备的Si超浅p+n结进行了电学表征.通过对超浅p+n结样品ECV测试和二次离子质谱(SIMS)测试及比较,发现用ECV测试获得的p+层杂质浓度分布及结深与SIMS测试结果具有良好的一致性,但ECV测试下层轻掺杂n型衬底杂质浓度受上层高浓度掺杂影响很大.ECV测试具有良好的可控性与重复性.对不同退火方法等离子体掺杂形成的超浅结样品的ECV系列测试结果表明,ECV能可靠地表征结深达10nm,杂质浓度达1021cm-3量级的Si超浅结样品,其深度分辨率可达纳米量级,它有望在亚65nm节点CMOS器件的超浅结表征中获得应用.

Ultra-shallow Si p^＋ n junctions formed by plasma doping are characterized by electrochemical capacitance-voltage （ECV）. By comparing ECV results with secondary ion mass spectroscopy（SIMS） results,it is found that the dopant concentration profiles in the heavily-doped p^＋ layer as well as junction depths measured by ECV are in good agreement with those measured by SIMS. But the ECV measurement of the dopant concentration in the lightly doped n-type substrate underneath is significantly influenced by the upper heavily-doped layer. The ECV technique is also easy to control and reproduce. The ECV results of ultra-shallow junctions （USJ） formed by plasma doping followed by different annealing processes show that ECV is capable of reliably characterizing a Si USJ with a junction depth as low as 10nm, and dopant concentration up to 10^21 cm^-3. Its depth resolution can reach as low as lnm. Therefore it shows great potential in applications for characterizing USJ in sub65nm technology node CMOS devices.