复合介质层SOI高压器件电场分布解析模型

Analytical Model for the Electric Field Distribution of an SOI High Voltage Device with a Compound Dielectric Layer

提出复合介质埋层SOI(compound dielectric buried layer SOI,CDL SOI)高压器件新结构,建立其电场和电势分布的二维解析模型,给出CDL SOI和均匀介质埋层SOI器件的RESURF条件统一判据.CDL SOI结构利用漏端低k(介电常数)介质增强埋层纵向电场,具有不同k值的复合介质埋层调制漂移区电场,二者均使耐压提高.借助解析模型和二维数值仿真对其电场和电势进行分析,二者吻合较好.结果表明,对低k值为2的CDL SOILDMOS,其埋层电场和器件耐压分别比常规SOI结构提高了82%和58%.

A novel SOI high voltage device with a compound dielectric buried layer is proposed,and an analytical model for its electric field and potential is established. A unified criterion of RESURF condition for CDL SOI and a uniform dielectric buried layer SOI device is given. The vertical electric field of the buried layer is enhanced due to the low k （permittivity） of the dielectric buried layer at the drain side, the electric field in the drift region is modulated by the compound dielectric layer with different k values, and both increase the breakdown voltage of the device. Based on the analytical model and the 2D device simulation,the electric field distribution and potential distribution are analyzed. The simulation results are in good agreement with the analytical results. It shows that the electric field of the buried layer and breakdown voltage of the CDL SOI when the low k value is 2 are enhanced by 82% and 58% compared to conventional SOI,respectively.