摘要
编译器提高程序并行性的主要障碍是:频繁的控制转移和模棱两可的内存访问。推断和推测是vliw处理器体系结构的新特点,为了消除分支或访存对指令级并行性识别的影响。指令调度是编译器挖掘程序指令级并行性的关键技术之一,本文论述了如何在指令调度中有效地利用推断和推测技术,提高程序的性能。
The main impediments for compiler to improve the parallelism of program, are frequent branches and ambiguous memory accessess. Predication and speculation are the new characters of vliw architectur, which eliminate the effects of the branch and the memory access on improving the instruction level parallelism. Instruction scheduling is one of the key technologies for compiler to extract the instruction level parallelism. This paper introduces how to combine the predication and speculation technologies with the instruction scheduling to improve the program's performance.
出处
《微计算机应用》
2006年第6期691-693,共3页
Microcomputer Applications
基金
国家973项目资助(G1999032900)。
关键词
指令调度
推断
推测
instruction scheduling, predicate, speculative