摘要
针对复杂集成电路设计中的功耗问题,提出了基于典型功能仿真和代码解析通过逻辑重组、操作隔离、预计算等技术实现寄存器传输级(RTL)低功耗的优化方法,该方法工作在RTL级,只需得到HDL仿真工具的支持。实验结果表明采用文章所提出的优化方法可显著降低电路功耗。
To solve the power problem in the IC design,the paper presents a RTL low power optimization method through logic reorganization,precomputing and operation isolation which is based on the typical functional simulation. The method works at the RTL level and only need the support of HDL simulation tools. Experimental results show that it can reduce the circuits power dramatically using the method.
出处
《现代电子技术》
2006年第23期112-115,共4页
Modern Electronics Technique
基金
国家自然科学基金(60176018)资助课题
关键词
逻辑重组
预计算
操作隔离
RTL
低功耗
logic reorganization
precomputing
operation isolation
RTL
low power