ALGORITHMS AND ARCHITECTURE IMPLEMENTATIONS OF MIMO OFDM BASEBAND RECEIVER BASED ON THE SIMD DSP CORE

This letter presents a programmable single-chip architecture for Multi-Input and Multi-Output (MIMO) OFDM baseband receiver. The architecture comprises a Single Instruction Multiple Data (SIMD) DSP core and three coprocessors that are used for synchronization, FFT and channel decoder. In this MIMO OFDM system, the Zero Correlation Zone (ZCZ) code is used as the synchronization word preamble of packet in the physical layer in order to avoid the interference from other transmitting antennas. Furthermore, a simple channel estimation algorithm is proposed which is appropriate for the SIMD DSP computation.

This letter presents a programmable single-chip architecture for Multi-lnput and Multi-Output （M1MO） OFDM baseband receiver. The architecture comprises a Single Instruction Multiple Data （SIMD） DSP core and three coprocessors that are used for synchronization, FFT and channel decoder. In this MIMO OFDM system, the Zero Correlation Zone （ZCZ） code is used as the synchronization word preamble of packet in the physical layer in order to avoid the interference from other transmitting antennas. Furthermore, a simple channel estimation algorithm is proposed which is appropriate tbr the SIMD DSP computation.