数字直扩接收机中同步环路设计与仿真

Tracking Loop Design and Simulation for Digital DSSS Receivers

同步是扩频通信系统中的一个重要问题。该文详细介绍了直接序列扩频(DSSS)通信系统中,数字科斯塔斯(Costas)环、数字延迟锁定环(DLL)的工作原理和环路中二阶环路滤波器的设计方法,并根据该原理提出了一种新的码环实现方案。使用Matlab对数字直扩接收机进行了仿真,不同环路滤波器参数下环路捕获性能的仿真结果及系统解调误码率证明了该环路滤波器在Costas环和DLL环中的正确性和实用性。其较好地解决了直扩系统中载波和伪码精确同步的问题。该文所设计的数字直扩接收机可有效地应用于CDMA及GPS等系统之中。

Synchronization is an important issue in spread spectrum communication systems. This paper introduces in detail the theories of digital Costas loop and digital early - late delay lock loop （DLL） in direct sequence spread spectrum （DSSS） communication systems, and a new method to implement the code loop is proposed. The design and realization of the two - tap loop filter in those two loops are followed in the next. This paper simulates the performance of the DSSS receivers in Matlab environment. The simulation results of the loop with different loop filter parameters and the demodulating BER of this system prove that this loop filter can meet the requirements of both Costas and DLL loops, and it can perfectly solve the tracking issues of both carrier and code loops in DSSS systems. The digital DSSS receiver designed in this paper can be effectively applied to the systems such as CDMA and GPS.