一种基于图模式匹配的逻辑单元映射算法

A Logic Cell Mapping Algorithm Based on Graph Pattern-Matching

基于数学中图模式匹配的概念,根据电路特征在子图同构算法中加入图约束条件,研究了针对不同结构的FPGA逻辑单元都能适用的映射算法FDUMap·实验中应用FDUMap将测试电路映射到不同的逻辑单元中·该算法比现有的专用的逻辑单元映射算法通用性更好,而平均性能上仅相差3%·

Based on the concept of graph pattern-matching, a universal FPGA logic cell mapping algorithm （FDUMap） was studied by adding graph constraints to subgraph i^morphism algorithm according to circuit character. In the experiment, FDUMap can successfully map the benchmarks to logic cells of different structures. Compared with existing logic cell specific mapping algorithms, FDUMap is better in universality and only 3% worse in average performance.