基于FPGA的时统设备的IRIG-B时间码设计

The Design of IRIG-B Time Code Based on FPGA Time Equipment

提出了一种以FPGA为核心，外围控制电路与D／A转换电路相结合的方法实现的IRIG-B DC码和AC码元的设计，重点分析了FPGA内部模块的具体实现过程．该设计既能检测时统设备输入端口是否工作正常，同时也能检测时统内部守时功能和交流码调制比的范围．

A design of IRIG-B DC and AC time code based on FPGA i：s given and the implement of FPGA module is analyzed . It has completed the function, which detects the input ports of time equipment by the assistant of the outer controlling circuit and D/A converting circuit, and also detects the function of inter punctuality and the modulating ratio of AC code.