一种高效低功耗JPEG2000小波变换器的设计

High Efficiency and Low Power Dissipation Implementation of 2-D DWT for JPEG2000

提出了一种高效低功耗的JPEG2000小波变换器的硬件结构,减小了二维离散小波变换器(2-D DWT)中暂存器的大小,降低了存储器的平均访问带宽,有效减小了芯片的面积和功耗.整个设计通过了FPGA验证,并采用HJTC 0.18μm工艺库进行了芯片设计.试验结果表明,片内暂存器的面积和功耗比普通方法分别减小了54.5%和61.4%.

A high efficiency and low power dissipation architecture was presented to perform the 2-D discrete wavelet transform （2-D DWT） in JPEG2000. The chip area and power dissipation could be decreased significantly due to the reduction of the temporal buffer size and the average bandwidth of memory access. A test chip of this implementation was designed with HJTC 0.18μm cell library and was demonstrated in FPGA. Experiment results showed that the area and the power consumption of the internal temporal buffer could be reduced by 54.5% and 61.4% respectively, compared with conventional methods.